Powering Chiplets into Physical AI Age
Our patented 100% Digital UniversalTM PHY is optimized for lowest power and area.
Our PHY Solution supports:
100% interoperability
20X lower area than UCIe SP
Less than 0.1 pj/bit power
With foundry support from 28nm to 2 nm.
See Video Above
Introducing PACE ECOSYSTEM
Together with 8 leading partners we have launched
the PHYSICAL AI Chiplet Ecosystem (P.A.C.E.)
Check out the website www.pacechiplets.com
.We have major partners co-developing chiplets and
IP leveraging YorChip's UCIe PHY.
Slash Packaging Costs with YorChip PHY
UCIe from other vendors is targeted to HPC our solution support both PHYSICAL AI and HPC.
Supports legacy wire bond and future 3D with same PHY.
Built-in self test - tests our PHY at speed resulting in Known Good Die, Redundancy & Monitoring.
Now you can build cost effective Chiplets and get to market faster watch our video above.
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